The hottest Ge introduces a new high-performance p

2022-10-13
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Ge launched a new high-performance packet processor

GE's new high-performance packet processor, which has higher network throughput, safer and easier to manage. Wanic 6354 adopts the latest Cavium octeon II processor, which has excellent performance

Charlottesville. On July 27, 2010, Ge intelligent released wanic 6354 intelligent high-performance packet processor for high-capacity IP networks when the load is no longer rising. The processor is based on the latest multi-core Cavium octeon IITM cn6335-aap Application Accelerator processor. Combined with a variety of advanced technologies, the network speed is higher and the network has more advanced security functions. A comprehensive development package can shorten the time of return on investment, and wanic 6354 brings sustainable competitive advantages to customers. The evaluation board will be launched in September

w the host of the dynamic stiffness testing machine adopts a 4-pillar frame structure. The anic 6354 IP packet processor is suitable for a variety of network applications, including session boundary control, security access, network address translation (NAT), traffic management, firewall, deep packet detection (DPI) and legal monitoring, secure IP communication, encryption, packet filtering, network monitoring/testing, etc

Rubin Dhillon, global director of communication product management of Ge intelligent platform, said: the rapid development of search engine, cloud computing, Internet retail, Web 2.0, mobile devices, online games and so on has made the network traffic reach an unprecedented level, which usually requires large server clusters. At the same time, many customers believe that the security and integrity of network communication are crucial, so it is necessary to manage the available bandwidth to optimize customer service. Wanic 6354 packet processor will play a core role in these networks, reduce the number of keyword dictionaries corresponding to the network processing search server, and improve the network traffic, so as to provide an economic and efficient solution

dhillon added: in addition, the new generation octeon processors have improved energy efficiency to a new level through new technologies, so products such as wanic 6354 can save a lot of energy

the performance of the new octeon II processor is four times that of the previous products, with more functions, faster running speed and higher traffic, but the energy consumption is equal to or even lower than that of the previous products. Therefore, wanic 6354 packet processor can provide customers with higher performance at the same energy consumption and cost. By sharing part of the communication processing work, the network traffic has been improved, and customers can also improve their products through network security, encryption and compression technology. Without these, customers will need more general processor computing and more server boards, devices or rack mounted servers. Therefore, transferring part of the traffic to wanic 6354 can save costs for many applications

wanic 6354 supports IEEE 1588 and hardware timestamp, which can be used for Ethernet synchronization and packet sorting. For the networks that transmit audio and video, this is particularly important for customers who need to monitor and evaluate the status of Ethernet communication, because it can simplify the detailed reporting of controlled network traffic/timing

wanic 6354 adopts 4-channel PCI Express second-generation bus and host interface to support high-speed communication. The front panel is equipped with four wiring ports and SFP connectors, supporting IEEE 10/100/1000baset Gigabit Ethernet and short-range and long-distance optical fiber connections

through a variety of advanced technologies, wanic 6354 layer has a packet processing line speed of up to 4GBIT/s. These technologies include MIPS64 second generation processing core, high-performance i/o bridging and queuing, high-speed internal connection, advanced storage technology: octeon II processor 2mbyte shared L2 cache and 4gbyte high-speed DDR3 data memory, and dual VLP Mini rdimm module. 512M take gold products as an example, byte DDR3 SDRAM is used for conventional expression pattern matching engine storage (hfa/dfa). 32 Mbyte SDRAM can be used as continuous memory to store processor status information. In addition, 16 gbyte eusb flash memory can be selected to store a large amount of data

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